Semiconductor dies include a power grid layer in the die that receives external power and spreads the power out to the various circuitries in one or more routings and circuitry layers of the die. The power supplied by the power grid is subject to a variety of different sources of noise that can disrupt normal operation of the circuitry. The noise may be in the form of voltage and current variations as well as in the form of additional signals. Since clocking type activities in the digital circuitry cause a majority of the noise, the noise can be filtered by capacitors in parallel with the power supply lines.
If the supply noise is higher than desired, then on-die decoupling capacitors are fabricated within the layers of the die. A metal-insulator-metal (MiM) capacitor is one example of an on-die decoupling capacitor that is used because it is embedded in the metal layers of the die and does not require additional die area.
A MiM capacitor requires a number of through vias. A through via connects the MiM plates to the adjacent grid layers on either side of the plates, i.e. to the upper layer and to the lower layer. The through via serves as a current path between the MiM and the rest of the power grid. This or any other type of vertical connection can make the connections within the die wherever the routing for these upper and lower layers overlap. The through vias like any other connecting vias are designed into the die uniquely for each die topology.